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83950 / DP83950BNU / DP83950 national pga ic
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The DP83950B Repeater Interface Controller ``RIC'' may be used to implement an IEEE 802.3 multiport repeater unit. It fully satisfies the IEEE 802.3 repeater specification including the functions defined by the repeater, segment partition and jabber lockup protection state machines. The RIC has an on-chip phase-locked-loop (PLL) for Manchester data decoding, a Manchester encoder and an Elasticity Buffer for preamble regeneration. Each RIC can connect to 13 cable segments via its network interface ports. One port is fully AUI compatible and is able to connect to an external MAU using the maximum length of AUI cable. The other 12 ports have integrated 10BASE-T transceivers. These transceiver functions may be bypassed so that the RIC may be used with external transceivers, for example DP8392 coaxial transceivers. In addition, large repeater units, containing several hundred ports may be constructed by cascading RICs together over an Inter-RIC bus. The RIC is configurable for specific applications. It provides port status information for LED array displays and a simple interface for system processors. The RIC posseses multifunction counter and status flag arrays to facilitate network statistics gathering. A serial interface, known as the Management Interface is available for the collection of data in Managed Hub applications.
Compliant with the IEEE 802.3 Repeater Specification
13 network connections (ports) per chip
* Selectable on-chip twisted-pair transceivers
* Cascadable for large hub applications
* Compatible with AUI compliant transceivers
* On-chip Elasticity Buffer, Manchester encoder and decoder
* Separate partition state machines for each port
* Provides port status information for LED displays including: receive, collision, partition and link status
* Power-up configuration options: Repeater and Partition Specifications, Transceiver Interface, Status Display, Processor Operations
* Simple processor interface for repeater management and port disable
* On-chip Event Counters and Event Flag Arrays
* Serial Management Interface to combine packet andrepeater status information together
* CMOS process for low power dissipation
